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FEATURES High Common-Mode Rejection DC: 90 dB typ 60 Hz: 90 dB typ 20 kHz: 85 dB typ Ultralow THD: 0.0006% typ @ 1 kHz Fast Slew Rate: 10 V/ s typ Wide Bandwidth: 7 MHz typ (G = 1/2) Two Gain Levels Available: G = 1/2 or 2 Low Cost
12k -IN
-6 dB Differential Line Receiver SSM2143
FUNCTIONAL BLOCK DIAGRAM
6k SENSE V+ VOUT V- 12k +IN 6k REFERENCE
SSM2143
PIN CONNECTIONS Epoxy Mini-DIP (P Suffix) and SOIC (S Suffix)
REF -IN +IN V- 1 2 3 4 8 NC
GENERAL DESCRIPTION
The SSM2143 is an integrated differential amplifier intended to receive balanced line inputs in audio applications requiring a high level of immunity from common-mode noise. The device provides a typical 90 dB of common-mode rejection (CMR), which is achieved by laser trimming of resistances to better than 0.005%. Additional features of the device include a slew rate of 10 V/s and wide bandwidth. Total harmonic distortion (THD) is less than 0.004% over the full audio band, even while driving low impedance loads. The SSM2143 input stage is designed to handle input signals as large as +28 dBu at G = 1/2. Although primarily intended for G = 1/2 applications, a gain of 2 can be realized by reversing the +IN/-IN and SENSE/REFERENCE connections. When configured for a gain of 1/2, the SSM2143 and SSM2142 Balanced Line Driver provide a fully integrated, unity gain solution to driving audio signals over long cable runs. For similar performance with G = 1, see SSM2141.
SSM2143
TOP VIEW (NOT TO SCALE)
7 V+ 6 VOUT 5 SENSE
OP-482 NC = NO CONNECT
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
15 V, -40 C = SSM2143-SPECIFICATIONS (V = specifications Tapply+85TC,=G+251/2, unless otherwise noted. Typical at C)
S A A
Parameter AUDIO PERFORMANCE Total Harmonic Distortion Plus Noise Signal-to-Noise Ratio Headroom DYNAMIC RESPONSE Slew Rate Small Signal Bandwidth
Symbol THD+N SNR HR SR BW-3 dB
Conditions VIN = 10 V rms, RL = 10 k, f = 1 kHz 0 dBu = 0.775 V rms, 20 kHz BW, RTI Clip Point = 1% THD+N RL = 2 k, CL = 200 pF RL = 2 k, CL = 200 pF G = 1/2 G=2 VCM = 0 V, RTI, G = 2 VCM = 10 V, RTO f = dc f = 60 Hz f = 20 kHz f = 400 kHz VS = 6 V to 18 V Common Mode Differential RL = 2 k
Min
Typ 0.0006 -107.3 +28.0
Max
Units % dBu dBu V/s MHz MHz
6
10 7 3.5
INPUT Input Offset Voltage Common-Mode Rejection
VIOS CMR
-1.2 70
0.05 90 90 85 60 110 15 28 14 2 300 +45, -20 0.03 18 10
+1.2
mV dB dB dB dB dB V V V k pF mA
Power Supply Rejection Input Voltage Range OUTPUT Output Voltage Swing Minimum Resistive Load Drive Maximum Capacitive Load Drive Short Circuit Current Limit GAIN Gain Accuracy REFERENCE INPUT Input Resistance Voltage Range POWER SUPPLY Supply Voltage Range Supply Current
Specifications subject to change without notice.
PSR IVR
90
VO ISC
13
-0.1
0.1
% k V
VS ISY
VCM = 0 V, RL =
6
2.7
18 4.0
V mA
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . 22 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 44 V Output Short Circuit Duration . . . . . . . . . . . . . . .Continuous Operating Temperature Range . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . +150C Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300C Thermal Resistance 8-Pin Plastic DIP (P): JA = 103, JC = 43 . . . . . . . . . C/W 8-Pin SOIC (S): JA = 150, JC = 43. . . . . . . . . . . . . . C/W
ABSOLUTE MAXIMUM RATINGS
ORDERING GUIDE
Model
Operating Temperature Range
Package Description
Package Option
SSM2143P -40C to +85C SSM2143S* -40C to +85C
*Contact sales office for availability.
8-Pin Plastic DIP N-8 8-Pin SOIC SO-8
-2-
REV. 0
SSM2143
1s
100 9 0
100 90
1 0 0 %
10 0%
50mV
Figure 1. Small-Signal Transient Response (VIN = 200 mV, G = 1/2, RL = 2 k, VS = 15 V, TA = +25C)
5V
5s
Figure 2. Large Signal Transient Response (VIN = +24 dBu, G = 1/2, RL = 2 k VS = 15 V, TA = +25C)
Figure 3. THD+N vs. Frequency (VS = 15 V, VIN = 10 V rms, with 80 kHz Filter)
Figure 4. Headroom (VS = 15 V, RL = 10 k, with 80 kHz Filter)
1.0
0.1
THD+N - %
0.01
0.001
0.0001 100
1k
10k
100k
LOAD RESISTANCE -
Figure 5. Dynamic Intermodulation Distortion, DIM-100 (VS = 15 V, RL = 100 k)
Figure 6. THD+N vs. Load (VS = 15 V, VIN = 10 V rms, with 1 kHz Sine, 80 kHz Filter)
REV. 0
-3-
SSM2143
40 VS = 15V TA = +25C 30
CLOSED-LOOP GAIN - dB
20
VS = 15V TA = +25C
10 0
-10 -20
-30 100
1k
10k
100k
1M
10M
FREQUENCY - Hz
Figure 7. Closed-Loop Gain vs. Frequency, 20 Hz to 20 kHz (Gain of 1/2 Normalized to 0 dB)
Figure 8. Closed-Loop Gain vs. Frequency, 100 Hz to 10 MHz
180 135 90 TA = +25C VS = 15V RL = 2k
COMMON-MODE REJECTION - dB
120 VS = 15V TA = +25C
100
PHASE - Degrees
80
45 0 -45 -90
60
40
20
-135 -180 100
0 100
1k
10k 100k FREQUENCY - Hz
1M
10M
1k
10k FREQUENCY - Hz
100k
1M
Figure 9. Closed-Loop Phase vs. Frequency
Figure 10. Common-Mode Rejection vs. Frequency
140
10
POWER SUPPLY REJECTION - dB
120 100
VS = 15V TA = +25C
8
OUTPUT IMPEDANCE -
VS = 15V TA = +25C
80 -PSRR 60 +PSRR 40 20
6
4
2
0 10
100
1k 10k FREQUENCY - Hz
100k
1M
0 100
1k
10k FREQUENCY - Hz
100k
1M
Figure 11. Power Supply Rejection vs. Frequency
Figure 12. Closed-Loop Output Impedance vs. Frequency
-4-
REV. 0
SSM2143
6 TA = +25C VS = 15V G = 1/2 RL = 2k
12.5V TA = +25C VS = 15V 10.0V
OUTPUT VOLTAGE SWING - V rms
5
4
OUTPUT VOLTAGE SWING - V rms
10M
7.5V
3
5.0V
2
1
2.5V
0 1k 10k 100k FREQUENCY - Hz 1M
0V 10
100
1k
10k
LOAD RESISTANCE -
Figure 13. Output Voltage Swing vs. Frequency
Figure 14. Output Voltage Swing vs. Load Resistance
40 TA = +25C
120
OUTPUT VOLTAGE SWING - V p-p
VOLTAGE NOISE DENSITY - nV/ Hz
100
VS = 15V TA = +25C
30
80
20
60
40
10
20
0 0
5
10 SUPPLY VOLTAGE
15
20
0 1 10 100 FREQUENCY - Hz 1k 10k
Figure 15. Output Voltage Swing vs. Supply Voltage
Figure 16. Voltage Noise Density vs. Frequency
1s
100 90
100 9 0
10ms
0.5V 0V -0.5V
10 0 %
1 0 0 %
5V 0V -5V
5mV
Figure 17. Low Frequency Voltage Noise from 0.1 Hz to 10 Hz*
5mV
Figure 18. Voltage Noise from 0 kHz to 1 kHz*
*The photographs in Figure 17 through Figure 19 were taken at V S = 15 V and T A = +25C, using an external amplifier with a gain of 1000.
REV. 0
-5-
SSM2143
16 VS = 15V R L = 2k 14
1ms
100 9 0
SLEW RATE - V/s
12
5V 0V -5V
1 0 0 %
10
8
6
5mV
4 -50
-25
0 50 25 TEMPERATURE - C
75
100
Figure 19. Voltage Noise from 0 kHz to 10 kHz*
Figure 20. Slew Rate vs. Temperature
0.10 VS = 15V VIN = 10V R S = 0
400 VS = 15V
INPUT OFFSET VOLTAGE - V
0.08
300
GAIN ERROR - %
0.06
200
0.04
100
0.02
0 -50
-25
25 50 0 TEMPERATURE - C
75
100
0 -50
-25
0
25
50
75
100
TEMPERATURE - C
Figure 21. Gain Error vs. Temperature
Figure 22. Input Offset Voltage vs. Temperature
5 VS = 15V 4 SUPPLY CURRENT - mA
SUPPLY CURRENT- mA
4.0 TA = +25C 3.5
3.0
3
2.5
2
2.0
1
1.5
0 -50
-25
0
50 25 TEMPERATURE - C
1.0
75
100
0
5
10 15 SUPPLY VOLTAGE - V
20
Figure 23. Supply Current vs. Temperature
Figure 24. Supply Current vs. Supply Voltage
*The photographs in Figure 17 through Figure 19 were taken at V S = 15 V and T A = +25C, using an external amplifier with a gain of 1000.
-6-
REV. 0
SSM2143
APPLICATIONS INFORMATION
The SSM2143 is designed as a balanced differential line receiver. It uses a high speed, low noise audio amplifier with four precision thin-film resistors to maintain excellent common-mode rejection and ultralow THD. Figure 25 shows the basic differential receiver application where the SSM2143 yields a gain of 1/2. The placement of the input and feedback resistors can be switched to achieve a gain of +2, as shown in Figure 26. For either circuit configuration, the SSM2143 can also be used unbalanced by grounding one of the inputs. In applications requiring a gain of +1, use the SSM2141.
+15V 0.1F +15V 0.1F
Setting R to 5 results in the CMRR of 71 dB, as stated above. To achieve the SSM2143's CMRR of 90 dB, the resistor mismatch can be at most 0.57 . In other words, to build this circuit discretely, the resistors would have to be matched to better than 0.005%! The following table shows typical resistor accuracies and the resulting CMRR for a differential amplifier. % Mismatch 5% 1% 0.1% 0.005%
DC OUTPUT LEVEL ADJUST
CMRR 30 dB 44 dB 64 dB 90 dB
12k -IN 2
7
6k 5
A V =1 2
7 6k -IN 5 SSM2143
12k 2 6 12k 3
AV = 2
SSM2143 12k +IN 3 4
+
6k
6 VOUT 1 +IN 1
6k 4
VOUT
The reference node of the SSM2143 is normally connected to ground. However, it can be used to null out any dc offsets in the system or to introduce a dc reference level other than ground. As shown in Figure 28, the reference node needs to be
+15V 0.1F +10V OP27
0.1F
0.1F
-15V
-15V
12k -IN 2
7
6k 5 -10V
Figure 25. Standard Configuration for Gain of 1/2
CMRR
Figure 26. Reversing the Resistors Results in a Gain of 2
SSM2143
12k +IN 3 4 0.1F 6k
6
VOUT REFERENCE
1
The internal thin-film resistors are precisely trimmed to achieve a CMRR of 90 dB. Any imbalances introduced by the external circuitry will cause a significant reduction in the overall CMRR performance. For example, a 5 source imbalance will result in a CMRR of 71 dB at dc. This is also true for any reactive source impedances that may affect the CMRR over the audio frequency range. These error sources need to be minimized to maintain the excellent CMRR. To quantify the required accuracy of the thin film resistor matching, the source of CMRR error can be analyzed. A resistor mismatch can be modelled as shown in Figure 27. By assuming a tolerance on one of the 12 k resistors of R, the equation for the common-mode gain becomes:
-15V
Figure 28. A Low Impedance Buffer Is Required to Adjust the Reference Voltage.
buffered with an op amp to maintain very low impedance to achieve high CMRR. The same reasoning as above applies such that the 6 k resistor has to be matched to better than 0.005% or 0.3 . The op amp maintains very low output impedance over the entire audio frequency range, as long as its bandwidth is well above 20 kHz. The reference input can be adjusted over a 10 V range. The gain from the reference to the output is unity so the resulting dc output adjustment range is also 10 V.
INPUT ERRORS
VOUT 6k 6k 6k = +1 - V IN 6k +12k 12k + R 12k + R
which reduces to:
VOUT 1/3 R = VIN 12k + R
This gain error leads to a common-mode rejection ratio of:
The main dc input offset error specified for the SSM2143 is the Input Offset Voltage. The Input Bias Current and Input Offset Current are not specified as for a normal operational amplifier. Because the SSM2143 has built-in resistors, any bias current related errors are converted into offset voltage errors. Thus, the offset voltage specification is a combination of the amplifier's offset voltage plus its offset current times the input impedance.
+18V ALL CABLE MEASUREMENTS USE BELDEN CABLE (500'). +18V 0.1F 7 2 SSM2142 1 8 3 2 5 SSM2143 4 1 -18V -18V 6 VOUT
CMRR =
|ADM| 18k |ACM| R
6k
VIN
6 4
12k + R -IN 12k +IN 6k CMRR = VOUT 18k R
3
7 5
0.1F
Figure 27. A Small Mismatch in Resistance Results in a Large Common-Mode Error
Figure 29. SSM2142/SSM2143 Balanced Line Driver/ Receiver System
REV. 0
-7-
SSM2143
LINE DRIVER/RECEIVER SYSTEM
The following data demonstrates the typical performance of the two parts together, measured on an Audio Precision at the SSM2143's output. This configuration was tested with 500 feet
500' CABLE
NO CABLE
Figure 30. THD+N vs. Frequency of SSM2142/SSM2143 System (VS = 18 V, VIN = 5 V rms, with 80 kHz Filter)
Figure 33. SSM2142/SSM2143 System Frequency Response (VS = 18 V, VIN = 0 dBV, 500' Cable)
5V
100 90
10 0%
10s
Figure 31. SSM2142/SSM2143 System Headroom- See Text--(VS = 18 V, RL = 10 k, 500' Cable)
500' CABLE
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
N-8
8 5
SO-8
0.280 (7.11) 0.240 (6.10)
1 4
8
5
0.430 (10.92) 0.348 (8.84)
0.070 (1.77) 0.045 (1.15) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN
PIN 1
0.1574 (4.00) 0.1497 (3.80)
1 4
0- 8
0.325 (8.25) 0.300 (7.62)
0.2440 (6.20) 0.2284 (5.80) 0.0500 (1.27) 0.0160 (0.41)
NO CABLE
0.210 (5.33) MAX 0.200 (5.05) 0.125 (3.18)
0.1968 (5.00) 0.1890 (4.80)
0.0196 (0.50) x 45 0.0099 (0.25) 0.0688 (1.75) 0.0532 (1.35) 0.0098 (0.25) 0.0075 (0.19) SEATING PLANE SEE DETAIL ABOVE
0.015 (0.381) 0.008 (0.204)
0.0098 (0.25) 0.0040 (0.10)
Figure 32. SSM2142/SSM2143 System DIM-100 Dynamic Intermodulation Distortion (VS = 18 V, RL = 10 k)
0.022 (0.558) 0.014 (0.356)
0.100 (2.54) BSC
SEATING PLANE
0 - 15
0.0500 (1.27) BSC
0.0192 (0.49) 0.0138 (0.35)
-8-
REV. 0
PRINTED IN U.S.A.
Figure 34. SSM2142/SSM2143 System Large Signal Pulse Response (VS = 18 V, RL = 10 k, No Cable)
C1598-24-11/91
The SSM2143 and SSM2142 provide a fully integrated line driver/ receiver system. The SSM2142 is a high performance balanced line driver IC that converts an unbalanced input into a balanced output signal. It can drive large capacitive loads on long cables making it ideal for transmitting balanced audio signals. When combined with an SSM2143 on the receiving end of the cable, the system maintains high common-mode rejection and ultralow THD. The SSM2142 is designed with a gain of +2 and the SSM2143 with a gain of 1/2, providing an overall system gain of unity.
of cable between the ICs as well as no cable. The combination of the two parts results in excellent THD+N and SNR and a noise floor of typically -105 dB over a 20 Hz to 20 kHz bandwidth. A comment on SSM2142/SSM2143 system headroom is necessary. Figure 31 shows a maximum signal handling of approximately 22 dBu, but it must be kept in mind that this is measured between the SSM2142's input and SSM2143's output, which has been attenuated by one half. Normally, the system would be shown as actually used in a piece of equipment, whereby the SSM2143 is at the input and SSM2142 at the output. In this case, the system could handle differential signals in excess of +24 dBu at the input and output, which is consistent with headroom requirements of most professional audio equipment.

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